Recently I was looking for a simple FPGA kit to play with building hardware of choice, ended up buying DE0-nano FPGA Kit.
The DE0-Nano board has a simple FPGA development platform to develop from a simple electronic circuit to NIOSII CPU based embedded system. It has Cyclone IV E device with 22,320 LEs. The DE0-Nano has a collection of interfaces including two external GPIO headers to extend designs beyond the DE0-Nano board, on-board memory devices including 32MB SDRAM and 2Kb EEPROM for larger data storage and frame buffering, as well as general user peripheral with LEDs and push-buttons. The advantages of the DE0-Nano board include its size and weight, as well as its ability to be reconfigured without carrying superfluous hardware, setting itself apart from other general purpose development boards. In addition, for mobile designs where portable power is crucial, the DE0-Nano provides designers with three power scheme options including a USB mini-AB port, 2-pin external power header and two DC 5V pins.
DE0-nano FPGA Kit configuration
Cyclone® IV EP4CE22F17C6N FPGA
- 22,320 Logic elements (LEs)
- 594 Embedded memory (Kbits)
- 66 Embedded 18 x 18 multipliers
- 4 General-purpose PLLs
- 153 Maximum FPGA I/O pins
Configuration Status and Set-Up Elements
- On-board USB-Blaster circuit for programming
- FPGA Serial Configuration Device (EPCS)
- Two 40-pin Headers (GPIOs) provides 72 3.3V I/O pins
- Two 5V power pins, two 3.3V power pins and four ground pins
- One 26-pin header provides 16 3.3V digital I/O pins and 8 analog input pins to connect to analog sensors, etc
- 32MB SDRAM
- 2Kb I2C EEPROM
General User Input/Output
- 8 green LEDs
- 2 debounced push-buttons
- 4 dip switches
- ADI ADXL345, 3-axis accelerometer with high resolution (13-bit)
- NS ADC128S022, 8-Channel, 12-bit A/D Converter
- 50 ksps to 200 ksps
- On-board 50MHz clock oscillator
USB Type mini-AB port (5V)
Two DC 5V pins of the GPIO headers (5V)
2-pin external power header (3.6-5.7V)
Board Layout diagram of DE0-nano
The another feature of this board is its support for NIOSII free processor IP. It enables you to start from scratch developing a embedded system. It helps to learn more on Embedded system, developing an BSP and embedded application apart from FPGA development. If you are curious enough, you are empowered to use it as platform to learn OS development on top of NIOSII CPU.
This FPGA kit comes with free edition of (it is called “Web edition” – it is not a cloud based tool, don’t confused by the name) Quartus, ModelSim and NIOSII Eclipse development tools. This free edition is more than enough to explore into FPGA world for a newbie. I have installed all these tools in Linux Mint 17, which is a solid stable installation – though you need to iron out some of the installation issues. Google extends plenty of help lines to get them fixed.