What is HVT, SVT & LVT cells? How they determine Power consumption and Timing?

Digital Hardware ASIC design involves not just complex logic implementation but also it aims to reduce power consumption and minimum time taken for an operation. Here I try to explain in a simplified way from Firmware Programmer’s perspective. A ASIC contains a large number of logic cells. Each logic cell can be used in design to implement various functions (it is like bricks to build a house). Each logical cell is made up of multiple transistors (switching elements). So the power and time taken by these cells determine overall characteristics of a final product. In this context it is essential to control the switching element’s power consumption and timing to get final result.

Power consumption involves both Dynamic power and Static power. Dynamic power is the power consumed during switching of transistors. Static power is due to leakage current that flows when the transistor is powered on (in logical OFF state). Here we focus on leakage current to understand HVT, SVT and LVT cells. Threshold voltage o a transistor is designed such a way that if gate voltage is below this threshold voltage, the transistor goes OFF state. Even though it goes OFF state, still there are some leak current. If it goes above threshold voltage, it goes ON state.

Look at the figure shown below which shows various leakage currents in a transistor.

Threshold Voltage and Leakage Current
Threshold Voltage and Leakage Current

The broad classifications are,

1. Sub threshold current – This can be controlled by narrowing down the junction area between transistor and substrate, which results in controlling threshold voltage for this transistor. High threshold voltage (High Vt) causes less leakage current but on other hand it causes delay in switching. Low threshold voltage (Low Vt) causes higher leak current and quick switching.

2. Gate leakage current

3. Reverse bias current

Now in this context let us see HVT, SVT and LVT.

HVT – High Threshold Voltage causes less power consumption and timing to switch is not optimized. It is used in power critical functions.

LVT – Low Threshold Voltage causes more power consumption and switching timing is optimized, used in time critical functions.

SVT – Standard Threshold Voltage offers trade-off between HVT and LVT i.e., moderate delay and moderate power consumption.



Low Power Techniques – A slide show


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  1. HVT causes less leakage power consumption and more dynamic power consumption. Similarly fr LVT, it has more leakage power consumption & less dynamic power consumption.

  2. ” Static power is due to leakage current that flows when the transistor is powered on (in logical OFF state)”, I do not think this statement is correct. You must be speaking about leakage power. There is a difference between Static Power and Leakage Power.

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